Design Serial Adder With Accumulator And Simulate Using Simulation Tool

DIGITAL SYSTEM DESIGN LABORATORY|azdocuments.in

DIGITAL SYSTEM DESIGN LABORATORY

Laboratory Code:18ECL38
IA Marks:40
Number of Lecture Hours/Week:02Hr Tutorial (Instructions)+ 02 Hours Laboratory Exam Mark:60
Exam Hour:03
CREDITS – 02

Course objectives:This laboratory course enables students to get practical experience in design, realization and verification of

• Demorgan's Theorem, SOP, POS forms
• Full/Parallel Adders, Subtractors and Magnitude Comparator
• Multiplexer using logicgates
• Demultiplexers and Decoders
• Flip-Flops, Shift registers and Counters.

NOTE:

1. Use discrete components to test and verify the logic gates. The IC numbers given are suggestive; any equivalent ICs can be used.
2. For experiment No. 11 and 12 any open source or licensed simulation tool may be used.

Revised Bloom's Taxonomy
Laboratory Experiments:

1. Verify
(i) Demorgan'sTheoremfor2variables.
(ii) The sum-of product and product-of-sum expressions using universal gates.

2. Design and implement
(i) Half Adder & Full Adder using i) basic gates. ii) NAND gates
(ii) Half subtractor& Full subtractor using i) basic gates ii) NAND gates

3.Designandimplement
(i) 4-bitParallelAdder/Subtractor using IC 7483.
(ii) BCD to Excess-3 code conversion and vice-versa.

4. Design and Implementation of (i) 1-bit Comparator
(ii) 5-bit Magnitude Comparator using IC 7485.

5. Realize
(i) Adder &Subtactors using IC 74153.
(ii) 4-variable function using IC74151(8:1MUX).

6. Realize (i) Adder &Subtractors using IC74139.
(ii) Binary to Gray code conversion & vice-versa (74139)

7. Realize the following flip-flops using NANDGates. Master-Slave JK, D & T Flip-Flop.

8. Realize the following shift registers usingIC7474/7495
(i) SISO (ii) SIPO (iii)) PISO(iv) )PIPO (v) Ring (vi) Johnson counter

9. Realize (i) Design Mod – N Synchronous Up Counter & Down Counter using 7476 JK Flip-flop
(ii) Mod-N Counter using IC7490 / 7476 (iii) Synchronous counter using IC74192

10. Design Pseudo Random Sequence generator using 7495. L2, L3

11. Design Serial Adder with Accumulator and Simulate using Simulation tool.

12. Design Binary Multiplier and Simulate using Simulation tool.

Course Outcomes: On the completion of this laboratory course, the students will be able to:

• Demonstrate the truth table of various expressions and combinational circuits
using logicgates.
?Design various combinational circuits such as adders, subtractors, comparators, multiplexers and demultiplexers.
• Construct flips-flops, counters and shift registers.
• Simulate Serial adder and Binary Multiplier.

Conduct of Practical Examination:

•All laboratory experiments are to be included for practical examination.
•Students are allowed to pick one experiment from the lot.
•Strictly follow the instructions as printed on the cover page of answer script for breakup of marks.
•Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made zero.